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Technical Glossary
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A
| Access Time | The interval between the time a request is made by the system and the time the data is available from the drive. |
| Active copper | A Fibre Channel connection that allows copper cabling up to 33 meters (36 yards) in length between devices. |
| Areal Density | The amount of data that's stored on a hard disk per square inch, and equal to the tracks per inch multiplied by the bits per inch along each track. |
| Alias server | A proposed standard as part of FC-GS-3. |
| Allocation | The process of assigning particular areas of the disk to specific data or instructions. An allocation unit is a group of sectors on the disk reserved for specified information. On hard disks for small computer systems, the allocation unit is usually in the form of a sector, block, or cluster. (See also allocation unit.) |
| Allocation Unit | An allocation unit, also known as a cluster, is a group of sectors on the disk that can be reserved for the use of a particular file. |
| AL_PA | Arbitrated Loop Physical Address. |
| AL_TIME | Arbitrated Loop Timeout value. |
| ANSI | American National Standards Institute. A standards-setting, non-government organization that develops and publishes standards for voluntary use in the United States. |
| ARB | Arbitrative Primitive Signal. |
| Arbitrated Loop | A shared 100/200-megabytes-per-second Fibre Channel transport supporting up to a maximum of 126 devices and 1 attachment to a Fabric. Ports with lower AL_PAs have higher priorities. |
| Arbitration | Method of gaining orderly access to a shared-loop topology. |
| ARP | Address Resolution Protocol. |
| ASIC | Application-Specific Integrated Circuit. |
| ATA/ATA-1 (Advanced Technology Attachment) | ATA is the official name given to the IDE interface by ANSI. |
| ATA-2/Fast ATA-2 | ATA-2 is also known as EIDE. ATA-2 includes DMA mode 1, and PIO mode 3. Fast ATA-2 includes upgrades in DMA and PIO modes. |
| ATA-3 | ATA-3 is an update to the ATA-2 standard. It includes SMART capability. |
| ATA-4 | ATA-4 is an update to the ATA-3 standard. It includes UltraDMA capability. |
| ATM | Asynchronous Transfer Mode. |
| AV Drive | Audio Video drive: a disk drive that is optimized for audio and video applications. Transferring analogue high-fidelity audio and video signals onto a digital disk and playing them back at high performance levels requires a drive that can sustain continuous reads and writes without interruption. AV drives are designed to avoid thermal recalibration during reading and writing so that lengthy transfers digital video data will not be interrupted, and frames will not be lost. |
B
| Bad Block | A block of memory that cannot reliably hold data due to a physical flaw or normal wear and tear. |
| Bandwidth | The transmission capacity of the cable, link, or system. |
| Block | In UNIX workstation environments, the smallest contiguous area that can be allocated for the storage of data. UNIX blocks are generally 8 Kbytes (16 sectors) in size. In DOS environments, the block is referred to as a cluster. (Note: This usage of the term block at the operating system level is different from its meaning in relation to the physical configuration of the hard drive. See Sector for comparison.) |
| Boot code | Software that initialized the system environment during the early phase of the boot up process. |
| Boot flash | Flash (temporary) memory that stores the boot code and boot parameters. |
| Buffer | An area of memory reserved for temporary storage of data that is waiting to be sent to a device that is not yet ready to receive it. |
| Burst Transfer Rate | The maximum amount of data per second a drive can supply intermittently; this is limited by the system interface. |
| Bus | The part of a chip, circuit board, or interface designed to send and receive data. |
| Bypass circuitry | Circuits that automatically remove a device from the data path when valid signals are dropped. |
C
| Cache | Specialized high-speed memory used to optimize data transfers between system elements with different performance characteristics, e.g., disk to main memory or main memory to CPU. |
| Cache Memory |
A temporary data storage area outside the user-accessible area. A cache memory is usually faster to access than the medium and thus has the effect of increasing data throughput by reducing the number of accesses to the medium. |
| CAM | Content addressable memory. |
| CDR | Clock and data recovery circuitry. |
| CE | Conformité Européenne. |
| Channel | A point-to-point link whose task is to transport data from one point to another. |
| Cluster | In DOS environments, the smallest contiguous area that can be allocated for the storage of data. DOS clusters are usually 2 Kbytes (4 sectors) in size. |
| Compact Flash | Flash (temporary) memory that is used in a manner similar to hard disk storage. |
| Compact PCI (cPCI) | CompactPCI is a very high performance industrial bus based on the standard PCI electrical specification in rugged 3U or 6U Eurocard (VME) packaging. Contrary to its desktop cousin, a CompactPCI board uses a high quality 2 mm metric pin and socket connector that meets IEC and Bellcore standards. CompactPCI boards are inserted from the front of the chassis, and the I/O can break out either to the front or through the rear. |
| Controller | A computer module that interprets signals between a host and a peripheral device. |
| COS | Class of service. |
| cPCI | See Compact PCI. |
| CRC | Cyclic Redundancy Check-an error detection procedure that identifies incomplete or faulty data in each sector. |
D
| Datagram | A Class 3 Fibre Channel service that allows data to be sent quickly to devices attached to the Fabric, with no confirmation of receipt. |
| DMA |
Direct Memory Access. A process for transferring data directly to and from main memory, without passing through the CPU. DMA improves the speed and efficiency by allowing the system to continue processing even while new data is being retrieved. |
| DRAM | Dynamic Random Access Memory: the read/write memory used to store data in personal computers. DRAM stores each bit of information in a "cell" composed of a capacitor and a transistor. Because the capacitor in a DRAM cell can hold a charge for only a few milliseconds, DRAM must be continually refreshed in order to retain its data. See also SRAM. |
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