Research and Development
Proven Quality, Enterprise Speed
Innovation is one of the keys to the success at BiTMICRO®. The company has been actively involved with research and development projects in the solid state storage (SSD) industry for about 20 years and has accumulated over 40 registered patents and many products. BiTMICRO has a reputation for exceeding the extreme reliability requirements as well as the capacity and performance needs of the enterprise market. Through the MAXio®, E-Disk® Altima™, and Ace Drive™ SSD product lines, defense, industrial, and enterprise needs are met with the highest standards.
The BiTMICRO products are protected by one or more of the following patents:
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5822251 | Expandable Flash-Memory Mass-Storage using Shared Buddy Lines and Intermediate Flash-Bus between Device-Specific Buffers and Flash-Intelligent DMA Controllers |
5956743 | Transparent Management at Host Interface of Flash-Memory Overhead-Bytes Using Flash-Specific DMA Having Programmable Processor-Interrupt of High-Level Operations |
6000006 | Unified Re-Map and Cache-Index Table with Dual Write-Counters for Wear-Leveling of Non-Volatile Flash RAM Mass Storage |
6317330 | Printed Circuit Board Assembly |
6496939 | Method and System for Controlling Data in a Computer System in the Event of a Power Failure |
6529416 | Parallel Erase Operations in Memory Systems |
6744635 | Removable Visual Indication Structure for a Printed Circuit Board |
6757845 | Method and Apparatus for Testing a Storage Device |
6970890 | Method and Apparatus for Data Recovery |
7506098 | Optimized Placement Policy for Solid State Storage Devices |
7826243 | Multiple Chip Module and Package Stacking Method For Storage Devices |
8010740 | Optimizing Memory Operations in an Electronic Storage Device |
8093103 | Multiple Chip Module and Package Stacking Method For Storage Devices |
8447908 | Multilevel Memory Bus System For Solid-State Mass Storage |
8560804 | Reducing Erase Cycles in an Electronic Storage Device that uses at least One Erase-Limited Memory Device |
8665601 | Solid State Drive with Improved Enclosure Assembly |
8788725 | Multilevel Memory Bus System For Solid-State Mass Storage |
9099187 | Reducing Erase Cycles in an Electronic Storage Device that uses at least One Erase-Limited Memory Device |
9372755 | Adaptive Power Cycle Sequences For Data Recovery |
9484103 | Electronic Storage Device |
9552848 | Solid State Drive with Improved Enclosure Assembly |
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151278 | Printed Circuit Board Assembly | Israel |
2388496 | Method and System for Controlling Data in a Computer System | Canada |
4397143 | Printed Circuit Board Assembly | Japan |
CN 1423917 | Printed Circuit Board Assembly | China |
I 420307 | Optimized Placement Policy for Solid State Storage Devices | Taiwan |
I228211 | Printed Circuit Board Assembly | Taiwan |
I540430 | Method For Data Storage | Taiwan |
TW 556075 | Method and System for Controlling Data in a Computer System in the Event of a Power Failure | Taiwan |
I332701 | Multiple Chip Module and Package Stacking Method For Storage Devices | Taiwan |
CN101375391B | Multiple Chip Module and Package Stacking Method For Storage Devices | China |
10-1391068 |
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5745730 | Multiple Chip Module and Package Stacking Method For Storage Devices | Japan |
5859181 |
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5822251 | Expandable Flash-Memory Mass-Storage using Shared Buddy Lines and Intermediate Flash-Bus between Device-Specific Buffers and Flash-Intelligent DMA Controllers |
5956743 | Transparent Management at Host Interface of Flash-Memory Overhead-Bytes Using Flash-Specific DMA Having Programmable Processor-Interrupt of High-Level Operations |
6757845 | Method and Apparatus for Testing a Storage Device |
7506098 | Optimized Placement Policy for Solid State Storage Devices |
7620748 | Hardware Assisted Non-Volatile Memory-To-Input/Output Direct Memory Access (DMA) Transfer |
8447908 | Multilevel Memory Bus System For Solid-State Mass Storage |
8010740 | Optimizing Memory Operations in an Electronic Storage Device |
8560804 | Reducing Erase Cycles in an Electronic Storage Device that uses at least One Erase-Limited Memory Device |
8788725 | Multilevel Memory Bus System For Solid-State Mass Storage |
9043669 | Distributed ECC Engine for Storage Media |
9099187 | Reducing Erase Cycles in an Electronic Storage Device that uses at least One Erase-Limited Memory Device |
9372755 | Adaptive Power Cycle Sequences For Data Recovery |
9400617 | Hardware-Assisted DMA Transfer With Dependence Table Configured To Permit - In Parallel - Data Drain From Cache Without Processor Intervention When Filled Or Drained |
9423457 | Self test solution for delay locked loops |
9484103 | Electronic Storage Device |
9501436 | Multi-Level Message Passing Descriptor |
9672178 | Bit-mapped DMA Transfer With Dependency Table Configured to Monitor Status So That A Processor Is Not Rendered As A Bottleneck In A System |
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I 420307 | Optimized Placement Policy for Solid State Storage Devices | Taiwan |
I540430 | Method For Data Storage | Taiwan |
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6529416 | Parallel Erase Operations in Memory Systems |
6496939 | Method and System for Controlling Data in a Computer System in the Event of a Power Failure |
9135190 | Multi-Profile Memory Controller for Computing Devices |
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TW 556075 | Method and System for Controlling Data in a Computer System in the Event of a Power Failure | Taiwan |
2388496 | Method and System for Controlling Data in a Computer System in the Event of a Power Failure | Canada |
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6981070 | Network Storage Device Having Solid State Non-Volatile Memory |
7613876 | Hybrid Multi-Tiered Caching Storage System |
7716389 | Direct Memory Access Controller with Encryption and Decryption for Non-blocking High Bandwidth IO Transactions |
7729370 | Apparatus for Networking Devices having Fibre Channel Node Functionality |
8032700 | Hybrid Multi-Tiered Caching Storage System |
8165301 | Input-Output Device and Storage Controller Handshake Protocol Using Key Exchange for Data Security |
8959307 | Reduced Latency Memory Transactions in Storage Devices |
9430386 | Multi-leveled cache management in a hybrid storage system |
9720603 | IOC To IOC Distributed Caching Architecture |
9734067 | Write Buffering |
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I438628 | Hybrid Multi-Tiered Caching Storage System | Taiwan |
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